Recent advances in communications technology have enabled the use of transmitting and receiving a sequence of very short-duration radio frequency (RF) pulses, the duration of which is typically less than a nanosecond. This is often referred to as impulse radio (IR). IR communication realizes faster data communication by transmitting pulsed signals using a wide frequency band.
In an IR communication system, the transmitting side superimposes data on a propagation signal to transmit the data to the receiving side at a distant location and the receiving side extracts the data from the incoming signal, and a communication is thereby realized. In order to accurately extract the data from the incoming signal, the receiving side clock should be synchronized with the transmitting side clock, but the transmitter clock and the receiving side clock are usually not synchronized.
Therefore, when the receiving side extracts desired data, the receiving side needs to establish synchronization with the transmitting side first. Moreover, the faster the receiving side is synchronized with the incoming signal, the faster the receiver can achieve an acceptable communication quality. As a result, a merit of improving average throughput in the system is obtained. Therefore, establishment of fast synchronization is desirable.
Many radio communication systems have some type of synchronization referred to as a “clock recovery” incorporated into the receiver. The synchronization, in general, is achieved by extracting a suitable control signal from the incoming signal, and using a PLL (phase locked loop) to keep the error between the extracted control signal and a locally generated copy of the control signal as small as possible.
One such technique is based on Delay-Locked-Loop (DLL) where the combined impulse response of the transmitting side filter, communication channel and receiver filter is computed in the receiver based on the incoming signal. DLL then tries to minimize the difference between the delay of the channel and the reference delay of the locally generated impulse response.
One known DLL tracking method is called an “Early-Late DLL” method. According to this method, one sample of the impulse response is calculated half of the chip earlier and another sample is calculated one half of a chip later than the desired sampling point.
Furthermore, another method is disclosed in Patent Document 1. According to this method, one sample of the impulse response is calculated half of a chip earlier than the desired sampling point and another sample is calculated at the desired sampling point. DLL is then using those sample values in phase locked loop to control the synchronization timing. Patent Document 1 discloses a DLL operation. More specifically, the ratio of those samples is compared to a reference ratio, and the result is used as an error signal for phase locked loop.    Patent Document 1: U.S. Pat. No. 5,590,160